1. Field of the Invention
The present invention relates to high-voltage MOS transistors, and, more particularly, to a method for providing triangle shapes of high-density plasma CVD film, thereby the grad and source/drain implantation can be applied in the same step, and an offset source/drain mask layer can be eliminated.
2. Description of the Prior Art
As the scale of integrated circuits (ICs) has been rapidly decreased, the design and layout rule becomes more stringent. Moreover, as the integrated circuits (ICs) are fabricated to be more compact, the integration of ICs with different applications becomes indispensable.
The high voltage device can be used in TFT LCD device, in laser print head application, etc. FIG. 1A to 1D show the cross section of a conventional high-voltage MOS transistor, which usually includes a silicon substrate 100 and a gate oxide 120. Moreover, a polysilicon layer 140 is deposited over the gate oxide layer 120. A photoresist layer is formed above the polysilicon layer 140 and the gate oxide layer 120, wherein the photoresist layer is defined and etched to form a gate. Then, the photoresist layer is removed. Consequentially, N-type ions 160I are implanted into the silicon substrate 100 to form N-type grad 160 therein. Moreover, the offset source/drain mask layer 180 is formed above the silicon substrate 100, and then N.sup.+ -type ions 200I are implanted into the N-type grad to form source/drain region.